1. Field of the Invention
The present invention relates to a display device, and more particularly, to an apparatus and method for driving an image display device in which data signals are transmitted in a multilevel to reduce transmission frequencies, power consumption and transmission lines.
2. Discussion of the Related Art
Recently, various flat panel displays that can reduce weight and volume of a cathode ray tube have been developed. Examples of the flat panel displays include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), and a light emitting display (LED).
Among them, the LCD includes a thin film transistor substrate, a color filter substrate, and a liquid crystal layer. At this time, the thin film transistor substrate includes a plurality of liquid crystal cells arranged in regions defined by a plurality of gate and data lines, and a plurality of thin film transistors serving as switching elements formed in the respective liquid crystal cells. The liquid crystal layer is formed between thin film transistor substrate and the color filter substrate, wherein the thin film transistor substrate is provided at a predetermined interval from the color filter substrate. The LCD displays desired images by forming an electric field in the liquid crystal layer depending on data signals to control.
FIG. 1 illustrates a related art apparatus for driving an LCD.
Referring to FIG. 1, the related art apparatus for driving an LCD includes an liquid crystal 10 including liquid crystal cells defined by first to nth gate lines GL1 to GLn and first to mth data lines DL1 to DLm, a data driver 40 supplying an analog image signal to the data lines DL1 to DLm, a gate driver 50 supplying scan pulses to the gate lines GL1 to GLn, and a timing controller 30 aligning externally input digital source data (RGB) to be suitable for driving of the liquid crystal 10, supplying the aligned digital source data to the data driver 40 and controlling the data driver 40 and the gate driver 50.
The liquid crystal 10 includes a thin film transistor (TFT) formed in a region defined by the gate lines GL1 to GLn and the data lines DL1 to DLm, and the liquid crystal cells connected to the thin film transistor. The thin film transistor supplies data signals from the data lines DL1 to DLm to the liquid crystal cells in response to the scan pulses from the gate lines GL1 to GLn. The liquid crystal cell is comprised of common electrodes facing each other by interposing a liquid crystal there between and sub pixel electrodes connected to the thin film transistor. Therefore, the liquid crystal cells are equivalent to a liquid crystal capacitor Clc. The liquid crystal cell includes a storage capacitor Cst connected to a previous gate line to maintain the data signals filled in the liquid crystal capacitor Clc until the next data signals are filled therein.
The timing controller 30 aligns the externally input digital source data (RGB) to be suitable for driving of the liquid crystal 10 and supplies the aligned digital source data to the data driver 40. Also, the timing controller 30 generates data control signals DCS and gate control signals GCS using a main clock DCLK, a data enable signal DE, and horizontal and vertical signals Hsync and Vsync, which are externally input, so as to control each driving timing of the data driver 40 and the gate driver 50.
The gate driver 50 includes a shift register that sequentially generates scan pulses, i.e., gate high pulses in response to the gate control signal GCS from the timing controller 30. To this end, the gate driver 50 includes a plurality of gate driver integrated circuits having the shift register.
The data driver 40, as shown in FIG. 2, includes a plurality of data driver integrated circuits that supply analog image signals to the respective data lines of the liquid crystal 10.
Each of the data driver integrated circuits 42 converts the data signals aligned from the timing controller 30 to the analog image signals in response to the data control signals DCS supplied from the timing controller 30 and supplies to the data lines DL1 to DLm the analog image signals corresponding to one horizontal line per one horizontal period in which the scan pulses are supplied into the gate lines GL1 to GLn. In other words, each of the data driver integrated circuits 42 generates a plurality of gamma voltages having different voltage values corresponding to the number of gray levels of the data signals and selects one gamma voltage as the analog image signal depending on the gray level values of the data signals to supply the selected signal to the data lines DL1 to DLm.
In the aforementioned related art apparatus for driving an LCD, the timing controller 30 converts the external digital source data (RGB) to TTL/CMOS level depending on a CMOS interface mode and transmits the converted data signals to the data driver 40 in one port-to-one port mode or one port-to-two port mode.
To this end, the related art apparatus for driving an LCD, as shown in FIG. 2, includes a plurality of data transmission lines 22 for data transmission between the timing controller 30 and each data driver integrated circuit 42, and a plurality of control signal transmission lines 24 for transmission of the data control signals DCS.
The timing controller 30 supplies the data signals of the TTL/CMOS level to the data transmission lines 22 and at the same time supplies the data control signals DCS to the control signal transmission lines 24.
Each of the data driver integrated circuits 42 is connected to the data transmission lines 22 and the control signal transmission lines 24 in common. Thus, the respective data driver integrated circuits 42 are sequentially driven depending on the data control signals DCS supplied from the control signal transmission lines 24 to receive the data signals from the data transmission lines 22 and convert the received data signals to the analog image signals to supply the converted signals to the respective data lines.
However, the aforementioned related art apparatus for driving an LCD has several problems. If resolution of the liquid crystal 10 increases, power consumption and electromagnetic interference (EMI) increase due to increase of data transmission lines and driving frequencies. Also, a problem arises in that the increase of the data transmission lines increases the cost of a printed circuit board.